Abstract:In order to adapt to the trend of high pixel demand of infrared focal plane (IRFPA),it is necessary to design a smaller size and better performance pixel circuit.A capacitive transimpedance amplifier (CTIA) was selected as the circuit structure of the pixel circuit.The cascode structure was adopted for the CTIA,and the integration time was able to be adjusted by using the optional integrated capacitors.The pixel circuit was modified to reduce the area for meeting the need of high pixel.In addition,the analog signal chain was set up and analyzed by simulation.Its layout was drawn and then it was post simulated to provide a guarantee of accuracy and reliability of the readout circuit (ROIC).After optimization,the area of the pixel circuit is 18 μm×18 μm,and the optional integrated capacitors are 60 fF and 400 fF respectively.The output swing of the analog signal chain is 2.03 V at room temperature and 1.52 V at low temperature,obtained in the post-simulation.The output integrated noise at low temperature is 213.6 μV,which is lower than the former structure,and can meet the requirements in the post-simulation.